.intel_syntax noprefix
.test_case_enter:
MFENCE
NOP
NOP
NOP
NOP
NOP
NOP
ADD R14, 40
JMP .bb0
.bb0:
AND RCX, 0b111111000000
ADD RCX, R14
CMOVZ ECX, dword ptr [RCX]
LAHF
ADC RAX, RAX
AND RDX, 0b111111000000
ADD RDX, R14
SETNZ byte ptr [RDX]
MOVSX EDX, BX
AND RCX, 0b111111000000
ADD RCX, R14
SUB CX, 19187
JNP .bb1
JMP .bb2
.bb1:
MOVZX EDX, CX
DEC AL
ADC RBX, RBX
CMOVBE EAX, EAX
OR DL, DL
SETB BL
JS .bb2
JMP .bb3
.bb2:
AND RDX, 0b111111000000
ADD RDX, R14
ADD qword ptr [RDX], 621805592
.bb3:
AND RBX, 0b111111000000
ADD RBX, R14
SUB R14, 40
MFENCE
